A preferred embodiment of this invention relates to an integrated circuit chip testing apparatus, such as an LGA type burn-in socket. An integrated circuit chip, as known in the art, may comprise a planar electronic device, such as illustrated in the copending applications, having a plurality of formed leads extending from the peripheral edges of the chip body, or it may comprise a ceramic substrate having an array of circuit elements or pads on a surface thereof. While the physical arrangement of the chip may be different, there are common problems and concerns regarding the testing thereof to ensure a functional chip. Accordingly, the further description will be directed to the applicability of this invention to an LGA burn-in testing apparatus. Notwithstanding, the inventive features hereof are suitable for use on other configurations of an integrated circuit chip.
Experience has shown that the catastrophic failure of an integrated circuit chip such as a microprocessor, will typically occur during the initial phase of the chip life. If the chip passes its initial operational phase, the life and reliability of the chip will have a relatively high probability.
In the case of a burn-in test socket, to precipitate early chip failure, the chip is "exercised" or powered while being subjected to relatively high external temperatures. Typically, a batch of chips is electrically powered in an oven where the temperature is maintained at approximately 150.degree. C. for an extended period of time, such as 1,000 hours. This is referred to in the art as "burn-in".
During burn-in, a batch of chips may be mounted on a mother board, where the chips are electrically connected to respective circuit elements on the mother board by a suitable means, such as one or more flexible electrical connectors. Maintaining good electrical contact between the chip and the flexible electrical connector is very important. There have been many prior art approaches to the development of an effective way to provide a uniform and normal force that would ensure electrical integrity.
Through the practice of this invention, a highly reliable system is provided to effectively test chips, which system is operator friendly. The manner by which these attributes and others are achieved will be apparent in the specification which follows, particularly when read in conjunction with the accompanying drawings.